Attempts to create memory models that forbid out-of-thin-air (OOTA) behaviors of C++ `memory_order_relaxed` accesses have been either non-executable, complex, or unloved by implementers. At the same time, we know of no instances of OOTA behavior in real C++ implementations. We focus on shared-memory programs and C++ implementations based on traditional compilers and hardware, including CPUs and GPGPUs, thus enabling analysis of semantic dependencies and OOTA behaviors by means of existing hardware models. We show that these models’ constraints prevent OOTA cycles from occurring in undefined-behaviorfree C++ programs running on such implementations, provided the cycles involve only volatile atomics. We accommodate nonvolatile atomics by defining “quasi-volatile” behavior and show that for existing implementations doing per-thread analysis and optimization, this behavior not only avoids OOTA but also is necessary to avoid incorrectly evaluating arithmetic expressions involving atomic accesses. It follows that enforcing OOTA avoidance requires no special action from implementations and no changes to user code. As a consequence, we are asking for only for a small non-normative change t